Prior art FIG. 1A illustrates a system 100 for encoding an audio signal/video signal, in accordance with the prior art. As shown, included is a coder-decoder (codec) 102 coupled to an encoder 104. In use, an audio signal [e.g. Sony/Philips digital interface (S/PDIF) signal, etc.] is received by the coder-decoder codec 102 which, in turn, decodes the same in the form of an audio clock signal and an audio data signal.
Such signals are received by the encoder 104 in addition to a video clock signal and a video data signal. While not shown, such video data/clock signals are typically received by way of a graphics processor which resides together with the codec 102 and the encoder 104 on a board together. As shown, the encoder 104 serves to identify a relationship between the audio clock signal and video clock signal for the purpose of encoding the audio/video signals into an output signal [e.g. a high definition multimedia interface (HDMI) signal, etc.].
To date, the extraction of the audio clock signal has been necessary for generating the encoded output signal. This requirement has necessitated the use of the aforementioned codec 102, and the cost associated therewith. Further, any attempt to avoid use of the codec 102 would still require a decoding of the audio signal in some capacity.
Prior art FIG. 1B illustrates an exemplary audio signal 150, in accordance with the prior art. As shown, a plurality of time slots 152 exist, whereby a transition within such time slots 152 indicates a logic “1” while a lack of such transition indicates a logic “0.” Unfortunately, decoding the audio signal 150 in such a manner is impossible without the aforementioned clock signal.